发明名称 STORAGE DEVICE WITH CHECK CIRCUIT
摘要 PURPOSE:To prevent the address contention in a storage device by providing an adder detecting the singularity of the address and a circuit detecting that all addresses are brought into the non-selective state. CONSTITUTION:A singularity check circuit 1 checks it that only 1-bit among 4 bits of address bus lines A0-A3 inputted in a memory 3 is selected and no address contention exists (singularity) and generates a singularity check result signal ADWR. If address contention takes place due to an error of any line of address bus lines, the level of the ADER signal is brought into logical 1 and the absence of the singularity of address selection is sent to a CPU 2. The CPU 2 receives it and informs the fault of the address bus line externally.
申请公布号 JPS62127956(A) 申请公布日期 1987.06.10
申请号 JP19850267118 申请日期 1985.11.29
申请人 HITACHI LTD 发明人 FUJITA KENJI
分类号 G06F12/16 主分类号 G06F12/16
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