| 摘要 |
PURPOSE:To correct a malfunction and to make operation of absolute value of the difference of two input signals at high speed similar to other arithmetic operation by providing the first and second arithmetic logic circuits, a selector circuit and a comparator circuit. CONSTITUTION:The first input signal A and the second input signal B are inputted to arithmetic logic circuits 1, 2 from the first and second input signal lines 11, 12 respectively. Operation mode of the arithmetic logic circuit 2 is determined by an instruction signal line 13, and the designated result of operation is outputted to signal lines 14, 15. A selector circuit 3 outputs either of signal lines 14, 15 to a signal line 16 as the output signal F of an arithmetic logic unit (ALU) by an arithmetic mode inputted from the signal line 13. A comparator circuit 4 outputs a signal E that shown Cnot equal to D or C=D, where C, D are the output signals of arithmetic logic circuit 1, 2 respectively, to a signal line 17. |
