| 摘要 |
PURPOSE:To secure a degree of freedom for arrangement and design of a wiring pattern with I/O units by using a connecting direction detecting circuit and a bidirectional buffer circuit which performs the switch between the input and output directions of a bus line with the output of the connecting direction detecting circuit inserted to an internal bus. CONSTITUTION:When the signal is supplied from the left as shown in the figure, a CPU supplies the I/O selection signal to an FFF1. Thus the FFF1 is set. The direction of the address signal is decided by the output Q2 of the FFF2 and the enable signal, the inverse of OE. When the output Q2 is kept at a low level, the left and right sides of the address signal are defined as the input and the output. Then the right and left sides of the address signal are defined as the input and the output when the output Q2 is kept at a high level. When the enable signal, the inverse of OE is kept at a high level, a 3-state buffer circuit 2 does not accept the output Q2. In the case of the data bus signal, the read signal RD is used in addition to the output Q2 for change of the direction between the input and the output.
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