发明名称 TRACKING ERROR SIGNAL GENERATING CIRCUIT
摘要 PURPOSE:To suppress occurrence of tracking jump and make tracking of high accuracy by providing a slice level properly for information on the degree and state of in and out of optically written bits, and restricting the level. CONSTITUTION:Output of D1 and D2 of quartered light receiving element 6 is inputted to an adder circuit 20, and output of D3 and D4 is inputted to an adder circuit 21. Output of circuits 20, 21 is inputted to a subtracter circuit 24 and a difference signal S11 is obtained. On the other hand, output of D1 and D3 is inputted to an adder circuit 22 and output of D2 and D4 is inputted to an adder circuit 23 and the two addition output is inputted to a subtracter circuit 25 and a difference signal S12 including tracking error information is obtained. The signal S1 is sent to a buffer circuit 26 and a window comparator 27 and sliced at proper slice level of positive and negative voltage. A switching circuit 28 opens a gate when the signal 13 is high level, and an output signal S14 is supplied to a multiplier circuit 29 together with the signal S12. Thus, highly accurate tracking can be made suppressing occurrence of track jump.
申请公布号 JPS62110631(A) 申请公布日期 1987.05.21
申请号 JP19850250132 申请日期 1985.11.08
申请人 SEIKO INSTR & ELECTRONICS LTD 发明人 TAKEI TOSHIJI;TAKEMURA YASUHIRO
分类号 G11B7/09 主分类号 G11B7/09
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