发明名称 DEBUGGING DEVICE FOR MICROPROCESSOR SYSTEM
摘要 PURPOSE:To perform the program debug with high efficiency by always monitoring the address bus information and detecting the abnormality of a program if produced to record automatically the run history of the program. CONSTITUTION:An address bus monitor circuit 3 monitors the address bus information and the memory writing signal and produces a trigger signal in case the address bus information gets out of an address range shown by the 1st address information or an address range shown by the 2nd address information. A memory circuit 4 always supplies and stores the address information and the data bus information given from a microprocessor system. Then both bus information are stored by a prescribed amount accumulated from a time point when the trigger signal is generated. A memory control circuit 5 reads the memory information out of the circuit 4 to output it to an output device like a typewriter, etc., and also controls the writing timing of both address and data bus information against the circuit 4.
申请公布号 JPS62109141(A) 申请公布日期 1987.05.20
申请号 JP19850250092 申请日期 1985.11.08
申请人 NEC CORP 发明人 SASAKI TSUTOMU
分类号 G06F11/34;G06F11/28;G06F11/36 主分类号 G06F11/34
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