VERIFICATION OF A PROCESSOR ARCHITECTURE HAVING A PARTIAL INSTRUCTION SET,申请号EP19830201660-传众专利搜索

首页产品黄页商标征信

会员服务注册登录

法人/股东/高管

发明名称	VERIFICATION OF A PROCESSOR ARCHITECTURE HAVING A PARTIAL INSTRUCTION SET
摘要
申请公布号	EP0111952(A3)	申请公布日期	1987.04.29
申请号	EP19830201660	申请日期	1983.11.23
申请人	INTERNATIONAL BUSINESS MACHINES CORPORATION	发明人	BUONOMO, JOSEPH PATRICK;PERRY, WENDELL LEE
分类号	G06F11/22;G06F11/26;(IPC1-7):G06F11/26	主分类号	G06F11/22
代理机构		代理人
主权项
地址

您可能感兴趣的专利

CELLULASE CEL5-KG71 GENE FROM RUMEN MICROORGANISM OF BLACK GOAT AND USES THEREOF

A NEW SCOLOPENDRASIN I PEPTIDE ISOLATED FROM THE SCOLOPENDRA SUBSPINIPES AND ITS SYNTHETIC COMPOSITION

The lipoxygenase and hydroperoxide lyase genes involved in the biosynthesis of 1-octen-3-ol in Tricholoma matsutake

MOLD FOR FORMING A LIQUID CRYSTAL DISPLAY FILM

BRUSH SECTION FOR AN ELECTRIC TOOTHBRUSH

HEAT TRANSFERRING MEMBER FOR SOLDERING DEVICE, ELECTRIC SOLDERING IRON WITH THE HEAT TRANSFERRING MEMBER, AND ELECTRIC DESOLDERING TOOL

Solid-state imaging device and solid-state imaging apparatus

BROADBAND, HIGH-LINEARITY LED AMPLIFIER HAVING HIGH OUTPUT CAPACITY IN A COMPACT DESIGN

THE NOXIOUS GAS OF DUST PURIFICATION APPARATUS

METHOD FOR CONSTRUCTING A COMPOSITE IMAGE

COATING AND DEVELOPING APPARATUS, COATING AND DEVELOPING METHOD AND STORAGE MEDIUM

HOUSING, BARREL AND CAMERA MODULE WITH THE SAME

SYSTEM AND METHOD FOR SEARCHING CONTENTS

Method for producing fabric board with via-hole

HEAT RESISTANT AND ELECTRICALLY INSULATING COMPENSATING LEAD WIRE FOR THERMOCOUPLE OF ELECTRIC FURNACE

Dual economizer system

AUTOMATIC MANAGING SYSTEM FOR SMART LIFT AND METHOD THEREOF

Method and apparatus for creating digital contents considering input sensitivity of mobile device

Method for recommending product consumer using electric circuit analysis technique

METHOD AND APPARAUS FOR TRANSMISSION IN A MULTIPLE INPUT MULTIPLE OUTPUT COMUNICATION SYSTEM