| 摘要 |
PURPOSE:To prevent the frequency variation of a voltage controlled oscillator due to omission of horizontal synchronizing signal and a noise by providing a horizontal oscillation circuit that oscillates in synchronization with a horizontal synchronizing signal, and inputting the output from the said oscillation circuit to a phase comparator in lieu of the horizontal synchronizing signal. CONSTITUTION:The horizontal oscillation circuit 101 is made oscillate in synchronization with the horizontal synchronizing signal 102 by means of automatic frequency control (AFC), and its horizontal oscillation output 103 is inputted to a phase comparator 104. To the comparator 104, a frequency-divided output 108 which is generated by frequency-dividing a clock output 106 i.e. the output from a voltage controlled oscillator 105 by a frequency divider 107 is inputted. A control voltage 109 in accordance with the phase difference between the said outputs 103 and 108 is supplied to the oscillator 105, forming a PLL. Accordingly, the clock output 106 is in synchronous with the horizontal oscillation circuit 103. Even if omission of the horizontal synchronizing signal 102 occurs, the horizontal oscillation output 103 is made scarcely vary by means of AFC and its omission does not occur. |
