MULTILEVEL PWM INVERTER

摘要

TITLE MULTILEVEL PWM INVERTER INVENTORS Pradeep Bhagwat Victor R. Stefanovic The multilevel inverter includes a voltage divider which when connected across a dc source ED, provides voltage at terminals having values between +ED to -ED. A first and a second set of thyristors pairs are connected between the positive or negative terminals, respectively, and a load terminal for applying selected voltage levels to the load. Any thyristor pair in these sets may be turned-off by firing the thyristor pair at the next highest voltage level. However, the main thyristors which are connected to the +ED or -ED terminal is turnedoff by a commutation circuit. This circuit includes a single capacitor maintained at zero voltage and subjected to an oscillating voltage during the commutation cycle to turn-off the conducting main thyristor. Such an inverter can easily provide a waveform having a series of pulses at one or more voltage levels thereby eliminating harmonics in the output.