发明名称 |
Electrical circuit arrangement and electrical circuit unit for use in such an electrical circuit arrangement |
摘要 |
A circuit arrangement having a plurality of circuit units (1-l to 1-n) each circuit unit (1-l to 1-n) having an input AI and and output AO. Each circuit unit (1-l to 1-n) includes an address generator which is incremented by a clock signal applied via terminal. Incrementation of the clock generator is inhibited when a logical '1' is applied to the input AI of a circuit unit. In order to generate addresses for all the circuit units they are connected in a daisy chain with the AO output of each circuit unit being connected to the AI input of the next circuit in the chain. The circuit units (1-l to 1-n) are arranged so that when a logical '1' is applied to its AI input a logical '1' appears at its AO output one clock period later. A monitoring unit may be provided to detect when all addresses have been set up by monitoring the state of the AO output of the last circuit unit (1-n) in the chain. This arrangement enables unique addresses to be allocated to all the circuit units while allowing each of the circuit units to be manufactured in identical form.
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申请公布号 |
US4642473(A) |
申请公布日期 |
1987.02.10 |
申请号 |
US19850713968 |
申请日期 |
1985.03.20 |
申请人 |
U.S. PHILIPS CORPORATION |
发明人 |
BRYANT, STEWART F. |
分类号 |
G06F12/06;G06F13/374;(IPC1-7):H02J1/00 |
主分类号 |
G06F12/06 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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