| 摘要 |
PURPOSE:To increase an operating speed about twice as compared to an ordinary speed by forming two independent random access memories and switching the reading and writing of the memory every period. CONSTITUTION:Until original N clock pulses are inputted, a circuit 60 generates a switching signal '0' and input data are successively inputted to a memory 10. When the (N+1)th clock pulse is inputted, a counter 40 is cleared, the switching circuit is turned to '1', the input data are written in a memory 20, and data read out from the address in the memory 10 are outputted through a multiplexer 50. Until the 2N-th clock pulse is inputted, the input data are written in the memory 20 and the data read out from the memory 10 become output data. Thereafter, the switching signal is changed every input of N clock pulses and data reading and writing from/in the memories 10, 20 are alternately switched. |
