发明名称 CCD DELAY CIRCUIT
摘要 PURPOSE:To suppress stably flicker noise while a coincident signal gain at all times by inserting charge detection section and a charge input section the same as those of a 0.5HCCD delay line into a system not performing any delay. CONSTITUTION:A picture signal fed from an input terminal is branched into the 1st signal path (a) and the 2nd signal path (b) at a branch point 4. A CCD delay section 2 performing substantial delay is arranged in the 1st signal line (a) and a picture signal is retarded by 0.5H in the CCD delay line 2. A signal charge is fed to the CCD delay section 2 via the 1st charge input section 1a, the signal charge delayed by the CCD delay section 2 is read via the 1st charge detection section 3a to form a delayed picture signal. On the other hand, the 2nd charge input section 1b of the same constitution as the 1st charge input section 1a and the 2nd charge detection section 3b of the same constitution as the 1st charge detection section 3a are provided in the 2nd signal path (b). Since the delay in the 2nd signal path is neglected substantially, the gain of the two signal paths (a, b) is made completely coincident at all times.
申请公布号 JPS61294918(A) 申请公布日期 1986.12.25
申请号 JP19850134300 申请日期 1985.06.21
申请人 FUJI PHOTO FILM CO LTD 发明人 YANO TAKASHI;KONDO RYUJI;SHIZUKUISHI MAKOTO;TAMAYAMA HIROSHI;MURAYAMA TAKASHI
分类号 H04N7/01;H01L21/339;H01L29/76;H01L29/762;H01L29/772;H03H11/26;H03K5/135 主分类号 H04N7/01
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