发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 PURPOSE:To improve the transmission characteristics of a signal by directly leading out an output wiring for an output circuit formed in a fundamental cell outside the cell from an active element by a metallic wiring having multilayer structure. CONSTITUTION:A first layer aluminum wiring 23 connects several drain region in a P channel MOS field-effect transistor M2 and an N channel MOS field- effect transistor M5 in common while being connected to a second layer aluminum wiring 24 through a through-hole section TH. The aluminum wiring 24 is lead out to both sides of a fundamental cell 1 while crossing power supply lines 21, 22, and output terminals outa, outb are formed to each of the aluminum wirings 24. The output terminals outa, outb are connected to inter-cell wirings wired in a wiring region 4 through the through-hole section TH. Accordingly, output wirings for an output circuit shaped into the fundamental cell 1 can be lead out even to the wiring regions 4 on both the upper side and lower side of the cell 1 through the aluminum wirings 24 having small resistance, thus improving the transmission characteristics, etc. of signals among cells.
申请公布号 JPS61292937(A) 申请公布日期 1986.12.23
申请号 JP19850134038 申请日期 1985.06.21
申请人 HITACHI LTD 发明人 SUZUKI YASUNAGA
分类号 H01L27/092;H01L21/3205;H01L21/82;H01L21/8238;H01L21/8249;H01L23/52;H01L27/06;H01L27/118 主分类号 H01L27/092
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