| 摘要 |
An improved back bias generator for an integrated circuit wherein a transistor circuit (34a) first acts as an isolation device during the charging phase of a charhe pump capacitor (30) and acts as a coupling device during a discharge phase of the capacitor, thus providing a higher back bias voltage (VBB) than is available from prior art circuits (Figs. 2 and 6) and wherein the charge pump capacitor is oriented in the circuit so that its source/drain terminal (node 10) cannot conduct to the substrate by way of the parasitic diode therebetween. |
