摘要 |
A frequency synthesizer is disclosed having n identical digital module stages, each of which stages generates one digit of the final frequency number of the synthesized frequency output signal. Each digit module stage comprises a series arrangement of a phase lock loop, a digit adder, and a digit shifter. The present invention provides a synthesized frequency generator with components that are inexpensive and readily available commercially, and moreover the frequency synthesizer is digitally controllable such that it is compatible with other digital control circuits.
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