发明名称 FREQUENCY COUNTER
摘要 PURPOSE:To prevent the one-bit error of a frequency counter, by counting the falling time of each pulse if the phase of a signal to be measured of a predetermined time interval at the start point of time is at high level and counting the rising time thereof if the phase is of low level. CONSTITUTION:The time base signal showing the time base from time ta to time tb is generated by a time base generation circuit 4 and the phase comparison of the signal to be measured is performed at time base start time ta by a phase comparing circuit 1. By this method, when the phase of the signal to be measured is a high level, a high level signal is outputted from the circuit 1 and a count edge change-over circuit 2 detects the falling time of the signal to be measured and, in a counter 3, a count input gate is opened only between the time ta and the time tb by the time base signal inputted to gate input and the counting of the number of pulses at the falling time of the signal to be measured detected by the circuit 2 to output the count result. Contrarily, when the phase of the signal to be measured is a low level, a low level signal is outputted from the circuit 1 and the number of pulses are counted by the counter 3 at the rising time of the signal to be measured and the count result is outputted.
申请公布号 JPS61265576(A) 申请公布日期 1986.11.25
申请号 JP19850107603 申请日期 1985.05.20
申请人 FUJITSU LTD 发明人 SATO YUICHI
分类号 G01R23/10 主分类号 G01R23/10
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