发明名称 INTER-MICROPROCESSOR DATA TRANSMISSION SYSTEM
摘要 PURPOSE:To enable a microprocessor for central processing to access to a shared storage without waiting state and thereby to improve the processing capability by providing the shared storage on the microprocessor for dispersed processing. CONSTITUTION:When an arithmetic processing part 3 accesses the shared storage 4, a bus control circuit 5 detects the access action and outputs a wait- request signal to provide a waiting state because a bus gate 6 is disabled by the initialization. When the circuit 5 detects that the microprocessor for central processing 2 is not accessing the shared storage 4, it inverses a bus gate signal 9, enables the bus gate 6 and disables a bus gate 7, as well as stops the outputting of the request signal 10. Therefore, the part 3 is relieved from the waiting state and accesses the shared storage 4.
申请公布号 JPS61240359(A) 申请公布日期 1986.10.25
申请号 JP19850081326 申请日期 1985.04.18
申请人 OKI ELECTRIC IND CO LTD 发明人 KIMURA HIROSHI
分类号 G06F15/16;G06F9/52;G06F12/00;G06F15/167;G06F15/177 主分类号 G06F15/16
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