发明名称 Output compare system and method automatically controlilng multiple outputs in a data processor
摘要 An output compare system and method for automatically controlling multiple outputs in a data processor includes an output compare mask register for holding a set bit therein. An output compare data register is coupled to a control output of the output compare mask register for holding a data bit therein. Apparatus for initiating an output compare function are coupled to a control input to the output compare mask register whereby the data bit will be transferred to an output of the data processor if the set bit is present. The system and method allow for simultaneous utilization of multiple output compare functions to achieve one-cycle-wide pulses on a timer output pin.
申请公布号 US4618968(A) 申请公布日期 1986.10.21
申请号 US19830549363 申请日期 1983.11.04
申请人 发明人
分类号 G06F1/14;G06F9/48;(IPC1-7):H03K21/00;G06F7/02 主分类号 G06F1/14
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