| 摘要 |
PURPOSE:To develop a high density dynamic RAM in an early time and at a low cost by connecting a bit line connected to a memory cell in the first memory cell block and a bit line connected to a memory cell in the second memory cell block to one sense amplifier to form a folding back type bit line construction. CONSTITUTION:Adjacent memory cell blocks are not selected by the same word line, so that the respective one bit lines 8 of the adjacent memory block s can be a pair and the respective one bit lines 8 are a pair and respectively connected to a sense amplifier. In the memory cell block MB1, memory cell bit lines BL3, BL4 selected by word lines WL2, WL4. WL6 of the first layer are connected and in an adjacent memory cell block MB2, memory cell bit lines BL1, BL2 selected by word lines WL1, WL3, WL5 of the first layer are connected. The memory cell of a small area, a large capacity and suitable for a high integration can be constructed in a folded bit line. |
