发明名称
摘要 PURPOSE:To apply the high-level and low-level signals to the base of the transistor of the multi-emitter and one of the emitters each to turn off the transistor of the emitter-earthed base input of the next step and the buffer circuit and then to set the connection of the transistor and the buffer circuit to the high impedance. CONSTITUTION:In the case of terminal S at the high level, the operation is decided by the base potential of transistor Q3 of the multi-emitter to secure the operation in accordance with input I1 and I2. When terminal S features the low level, Q1 and Q2 are turned off with increment of the potential at node c. And Q3 is turned on and the current flows to terminal S with the base current of Q6 turned off at O. With Q3 turned on, node b features the low level with Q4 and Q5 truned off and output X features the high impedance. In this way, the high impedance state can be set only with multi-emitter terminal E2 of diode D1, D3 and Q3. As a result, the number of the element can be reduced with the transistors connecting to node b and c reduced, thus decreasing the parasitic capacity as well as the propagation delay time.
申请公布号 JPS6142898(B2) 申请公布日期 1986.09.24
申请号 JP19780056765 申请日期 1978.05.12
申请人 NIPPON ELECTRIC CO 发明人 KYOZUKA NOBORU;MORI SUSUMU
分类号 H03K19/0175;H03K19/082 主分类号 H03K19/0175
代理机构 代理人
主权项
地址