| 摘要 |
PURPOSE:To delete the occurrence of the trouble so that the output from an arithmetic and logic unit is outputted without fail by turning on a fail inhibiting switch. CONSTITUTION:When the fail inhibiting switches 11 of the first and second operators 1 and 2 are off and the input of an adder input terminal X1 goes to be abnormal, the output of the operator 1 and next, the output of the operator 2 also fails. On the contrary, when the first and second fail inhibiting switches 11 are on and the fail inhibiting switch 11 of the operator 2 is 1, the adder input of the operator 1 fails, thereby the output fails. Consequently, the input of the arithmetic unit 2 fails, a prescribed arithmetic processing is executed and the output value holds the previous value and is normal. When an adder input normally returns, the output of the operator 1 also goes to be normal. Consequently, when the output of the operator 1 is used at the external part, the output is detected as a fail at the time of the input abnormality, and when the input goes to be normal, its action is also returned to normality. |
