发明名称 CO-PROCESSOR CONTROLLING SYSTEM
摘要 PURPOSE:To execute a linkage at a high speed by outputting the control signal of the time when inputting a data to a co-processor from a main processor, in a bus cycle for reading out an operation operand onto a data bus from a storage device. CONSTITUTION:When a main processor 1 starts a co-processor 2, in case when an operand data of its operation is in a storage device 3, in a bus cycle for reading out the operand data onto a data bus 6 from the storage device 3 by addressing of the main processor 1, a control signal DT to the co-processor from the main processor is made active, and the operand data on its data bus 6 is inputted directly to the co-processor 2. Also, even when storing an operation result operand into the storage device 3, it is written directly in the storage device 3 from the co-processor 2 by the control signal DT.
申请公布号 JPS61204758(A) 申请公布日期 1986.09.10
申请号 JP19850044852 申请日期 1985.03.08
申请人 HITACHI LTD 发明人 TAKATANI SOICHI;MIYAZAKI YOSHIHIRO
分类号 G06F15/16;G06F9/38;G06F13/16;G06F13/38;G06F15/167;G06F15/177 主分类号 G06F15/16
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