发明名称 Data-processing apparatus fetching operands from independently accessible memories.
摘要 <p>The data processing apparatus has first and second storages (10-1, 10-2) each independently accessible. An instruction unit (1, 2, 3, 4, 8) applies a fetch request on a one-operand instruction to the first storage, and a fetch request on a two-operand instruction to the first and second storages. In case of a fetch request on a two-operand instruction, a storage control unit (19) instructs the instruction unit to produce again a fetch request if one of the first and second storages is busy, and execute reading the operands in the order of decoding instructions.</p>
申请公布号 EP0193654(A2) 申请公布日期 1986.09.10
申请号 EP19850116467 申请日期 1985.12.23
申请人 HITACHI, LTD. 发明人 WATANABE, MASAYA;ABE, SHUICHI
分类号 G06F9/38;G06F12/08;(IPC1-7):G06F9/38 主分类号 G06F9/38
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