| 摘要 |
PURPOSE:To induce easily and surely a pseudo fault and to check fault detecting capacity at a high speed by fixing the test pattern to be applied to the input terminal of a logical circuit to be tested at logic '1' or '0' by the instruction from a control part. CONSTITUTION:The input terminal of the logical circuit 2 with which the pseudo fault is desired to be induced is selected by the control part 7. The value of a control signal group 15 is set at (0, 1) or (1, 0) by the control part 7, by which the test pattern at the point corresponding to the selected terminal of the 1st register 3 group is fixed at the logic '1' in the case of an open fault and at the logic '0' in the case of a ground fault. If the procedure for an ordinary test is executed, the test pattern is fixed at the logic '1' or '0' in spite of the impression of any test pattern to the selected terminal and therefore the pseudo fault is eventually induced. The fault detecting capacity of the test pattern in the stage of generating the pseudo fault is thus examined. |
