| 摘要 |
PURPOSE:To enable a data analysis with an indefinite length to work without transferring serially of a data to be analized and to fasten the concentration of an analizing process by retrieving a table from the output of a shift circuit and enabling a reception means and the shift circuit to work by the bit length information of the table. CONSTITUTION:An input data, that is, the data to be analized is loaded in 10 and 11 registers which work as a reception means in parallel by every 16 bits. This input data is controlled by a clock outputted from a sequencer 14 which is one of control means. A shift circuit 12 for retrieval shifts in parallel the data loaded in 10 and 11 registers according to a shift volume outputted from the sequencer 14 and outputs a shifted data to be analized to a table 3. The sequencer 14 retrieves the table 3 according to the outputted data from the shift circuit 12 for retrieving and carries out an analized result and an analized bit length concerned. This analized bit length becomes an input to the sequencer 14.
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