| 摘要 |
The object of the invention is an arrangement for processing ternary vector lists, which is connected to a general-purpose computer and a memory arrangement as a supplementary processing device. The aim is to increase the speed of essential processes of algorithms on the basis of ternary vector lists, at relatively low cost, and the problem of carrying out a useful operation in every memory cycle for the critical processes is solved. Essentially, the solution is that a second operand memory, a mask operand memory, a first and second condition allocator, a function allocator and an address generator circuit are available to the supplementary processing device. Other features concern condition stop circuits, a mode register, and the connections of the named modules to each other, and to the data input, data output and address lines of the general-purpose computer. <IMAGE>
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