| 摘要 |
PURPOSE:To contrive to improve the reliability by reducing damage due to plasma etching and preventing the increase in leakage current and the variation in threshold voltage, by a method wherein a region serving as the electrode of a polycrystalline semiconductor layer is removed halfway by plasma etching, and the remnant layer is thermally oxidized; then, the oxide layer and the insulation film thereunder are chemically decomposed away. CONSTITUTION:An element-isolating oxide film 3 having a P<+> channel stopper 2 at the bottom is formed on a P type Si substrate 1, and a gate oxide film 5 is formed on the interelement forming region 4. A polycrystalline Si layer 6 is formed over the whole surface, and phosphorus is introduced. A resist pattern 7 of gate electrode form is shaped on the layer 6. After the pattern 7 is removed by etching away the layer 6 halfway by RIE, the remnant portion of the layer 6 is oxidized into an oxide Si layer 15. The substrate 1 surface is exposed by wet-etching the layer 15, and a gate electrode 106 is formed. An oxide film 16 is formed, and N<+> type source and drain regions 9 are formed by As ion implantation. The film 16 is removed; an oxide Si film 10, a PSG insulation film 11, and windows 12 are provided; and wirings 13, 14 a re formed, thus constituting a MOS Tr. |
