| 摘要 |
All the gates and source/drain contacts in a CMOS device (1) are formed from polysilicon or polycide. Using two levels of polysilicon or polycide, the first level is used to simultaneously form the gate (10) of one (2) of the CMOS transistors and buried contacts (30, 31) to the source/drain regions (13, 14) of the other (3) CMOS transistor. The second level of polysilicon or polycide is then used to simultaneously form the gate (15) of the other (3) CMOS transistor and the buried contacts (28, 29) to the source/drain regions (8,9) of the first mentioned CMOS transistor. Because all the gates and contacts are polysilicon or polycide, it is possible to make interconnections between the gate on one of the devices and the source or drain of the other of the devices and between the gate on the other of the devices and the source/drain on said one of the devices simply by patterning the polysilicon or polycide layers. |
