发明名称 DELAY CIRCUIT
摘要 <p>PURPOSE:To rise an output current at a high speed by feeding back positively a part of an output current to a time constant capacitor connected to a source of an FET in an on-delay delay circuit. CONSTITUTION:In turning on a switch 9, an N-FET-1 is turned on, a capacitor 4 is charged through a resistor 5 and an FET1 and the source potential of the FET1 rises. When the source potential approaches the gate potential after a prescribed time, the internal impedance of the FET starts increasing and when the drain potential breaks down a Zener diode 6, a base current of a transistor (TR) 7 flows and the TR7 is turned on. Its emitter current flows to the capacitor 4 at the same time and increases the internal imp-edance of the FET1, then the emitter current is arisen at a high speed by the positive feedback action.</p>
申请公布号 JPS61112422(A) 申请公布日期 1986.05.30
申请号 JP19850246798 申请日期 1985.11.01
申请人 ASO MAKOTO 发明人 ASO MAKOTO
分类号 H03K5/13;H03K17/042;H03K17/28 主分类号 H03K5/13
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