PARALLEL ARITHMETIC PROCESSING DEVICE

摘要

PURPOSE:To permit the limitting of number of a saving buffer for the same of original data for each command by controlling the extent of passing of arithmetic execution of a command within the number of preset commands. CONSTITUTION:Instruction words and operands read from a memory device 5 are sent to operators 7 and 10. An instruction number generator 4 generates an instruction number indicating the conceptual sequence for each instruction each time the instruction is decoded in an instruction decorder 2, and sends it to an instruction number register 8 or 11. Using instruction addresses of instructions which were input through signal conductors 54 and 55 and are currently performing arithmetics in the operators 7 and 10, an instruction difference detecting circuit 50 suspends the execution of the arithmetics, especially writing of the result, in the operator 7 if they satisfies certain conditions. The case of an instruction difference detecting circuit 51 is alike.