发明名称 INFORMATION PROCESSOR
摘要 PURPOSE:To improve the efficiency of information transfer by providing a condition flip-flop (FLAG), which indicates the transfer preparation state of an input/output device, in a CPU. CONSTITUTION:A FLAG2 indicating the transfer preparation state of an input/ output device 3 is provided in a CPU1. When an information transfer instruction comes to the input/output device 3 from the CPU1, a control circuit 7 is operated to set data of an input/output apparatus 4 to a data latch circuit 6. The data set signal from the input/output apparatus 4 is a pulse signal or a level signal which sets an FLAG5 each time when one data is set to the data latch circuit 6, and the information storage operation of the FLAG 2 is interlocked with that of the FLAG5. Thus, the information transfer preparation state of the input/output device 3 is always indicated on the FLAG2 of the CPU1.
申请公布号 JPS6194168(A) 申请公布日期 1986.05.13
申请号 JP19850185724 申请日期 1985.08.26
申请人 HITACHI LTD 发明人 KIHARA TOSHIMASA
分类号 G06F13/42 主分类号 G06F13/42
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