| 摘要 |
PURPOSE:To obtain memory cells having the high degree of integration by boring a groove to a semiconductor substrate, coating the side wall and base of the groove with an SiO2 film and forming a polycrystalline Si layer as a capacitor electrode for two memory cells as well as an isolation region and polycrystalline Si layers, which are positioned on both sides of the Si layer and in which charges are stored, into the groove while being separated by vertical SiO2 films. CONSTITUTION:A groove (h) is bored to a semiconductor substrate 11, the side wall and base of the groove are coated with an SiO2 film 19, and a polycrystalline Si layer 20 positioned at a central section and polycrystalline Si layers 17 positioned on both sides of the Si layer 20 are buried into the groove while separated by vertical SiO2 films 18. Consequently, the layer 20 is used as a capacitor electrode for two memory cells while being also employed as an isolation region, the layer 20 is given reference potential, and the layers 17 are used as storage regions for charges. An N type source region 15 employing a P type region 12 as an underlay is shaped to the upper outer circumference of the groove (h), the layers 17 are connected to gate electrode 13 consisting of polycrystalline Si through polycrystalline Si layers 16 and connected to word lines, and N type layers 14 adjacent to the gate electrodes are connected to bit lines. |
