发明名称 |
Hybrid E2 cell and related array |
摘要 |
An improved MOS E2 cell is described which includes a floating gate and a thin oxide region. Charge injected into the substrate is used to program the floating gate by hot electron injection through the tunnel oxide region. Erasing is accomplished by tunneling through the thin oxide region. With this arrangement, the capacitance coupling between the floating gate and control gate is greatly reduced, allowing the cell to be substantially smaller. Several novel inhibit modes permit the fabrication of an array without using a selection device for each of the cells.
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申请公布号 |
US4577295(A) |
申请公布日期 |
1986.03.18 |
申请号 |
US19830499198 |
申请日期 |
1983.05.31 |
申请人 |
INTEL CORPORATION |
发明人 |
EITAN, BOAZ;KOLODNY, AVI;AMRANY, DANIEL;MCCREARY, JAMES |
分类号 |
G11C16/04;H01L29/788;(IPC1-7):G11C13/00 |
主分类号 |
G11C16/04 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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