发明名称 MANUFACTURE OF COMPLEMENTARY INSULATED GATE FIELD EFFECT TRANSISTOR
摘要 PURPOSE:To prevent a net impurity concentration in a well region from reducing, by forming a doner impurity layer on an n type semiconductor substrate surface, in which the doner impurity doped polycrystalline Si film acts as a diffusion source. CONSTITUTION:Over an n type Si substrate 11, an SiO2 film 12 and an Si3N4 film 13 are formed. After a resist pattern 14 is formed, Si3N4 film patterns 131', 132' are formed using the pattern 14 as a mask. After the pattern 14 is removed, over the entire face a polycrystalline Si film 15 is deposited and doner impurities are implanted. Next, using as a mask a resist pattern having a p type well region opened, a polycrystalline Si pattern 15 is formed. Thereafter, acceptor impurities are implanted therein and are heat-diffused to form a p type well region 18. At the same time, a doner impurity layer 19 is formed. After an acceptor impurity implanted layer 20 is formed on the region, a field oxidation film 21 is formed by selective oxidation using the patterns 131', 132' as a mask.
申请公布号 JPS6140052(A) 申请公布日期 1986.02.26
申请号 JP19840160551 申请日期 1984.07.31
申请人 TOSHIBA CORP 发明人 INATSUKI TATSUYA
分类号 H01L27/08;H01L21/76;H01L21/8238 主分类号 H01L27/08
代理机构 代理人
主权项
地址