发明名称 |
SEMICONDUCTOR DEVICE HAVING A WELL STRUCTURE |
摘要 |
<p>: A semiconductor device with a well structure is designed to avoid the undesirable phenomenon known as latch-up, attributable to a parasitic element, and to enhance the density of integration. For this purpose a groove-like insulator layer is formed at a boundary between the well region and the semiconductor body to extend in the depthwise direction of the semiconductor body. This insulator layer separates the conductive regions that constitute the parasitic element. As a result, latch-up is avoided, the area of the well region can be made small and the density of integration can be made about 1.4 times higher than in a prior-art LSI.</p> |
申请公布号 |
CA1200328(A) |
申请公布日期 |
1986.02.04 |
申请号 |
CA19830430676 |
申请日期 |
1983.06.17 |
申请人 |
HITACHI, LTD. |
发明人 |
YAMAMOTO, SYUICHI;HASHIMOTO, NORIKAZU;SASAKI, TOSHIO;MASUHARA, TOSHIAKI;MINATO, OSAMU;TAMAKI, YOICHI;HAYASHIDA, TETSUYA |
分类号 |
H01L27/08;H01L21/762;H01L27/092;H01L29/78;(IPC1-7):H01L29/06 |
主分类号 |
H01L27/08 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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