发明名称 SEMICONDUCTOR DEVICE
摘要 PURPOSE:To improve the degree of integration and reliability by making each gate metal for an enhancement mode-transistor (Tr) and a depletion mode-transistor (Tr) different and directly connecting the gate metals. CONSTITUTION:Gates 14b, 24b in enhancement mode Trs E each constituting inverters 11, 12 at a pre-stage and a post-stage are formed by Al, and gates 15b, 25b in depletion mode Trs D are shaped in multilayer structure in which lowermost layers are composed of Ti. According to the constitution, the gates 15b, 25b extend on output node regions 17, 27 on the surface of an insulating film, and the output node regions 17, 27 are lead out through contact holes 17a, 27a, thus requiring the connection of wirings and the wirings and gates. The gate 15b functions as an output terminal OUT for the inverter 11, and is superposed and connected directly to the connecting section 24c of the gate 24b as an input terminal IN for the inverter 12, thus requiring no contact hole in pads for the gate 24b, then miniaturizing the pads.
申请公布号 JPS6113658(A) 申请公布日期 1986.01.21
申请号 JP19840133763 申请日期 1984.06.28
申请人 FUJITSU KK 发明人 KURODA SHIGERU
分类号 H01L21/8236;H01L27/088 主分类号 H01L21/8236
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