发明名称 DYNAMIC MEMORY
摘要 PURPOSE:To remove noise disturbance due to a peak currrent during the operation of a word line selecting circuit and stabilize the operation by dividing word lines by memory cell arrays and putting them delay operation. CONSTITUTION:Memory cell arrays 11 and 12 are equipped with a bit line sense amplifier circuit 13 including memory cells CS and a word line selecting circuit 14. Activation signals phiW of the circuit 14 are diving by blocks of the arrays 11 and 12; the selecting circuit 14 of the array 11 is put in operation and then the selecting circuit 14 of the array 12 is operated after the dalay time of a circuit 14. Consequently, memory currents are two small peak current (a) and (b) during activation and two small peak currents (c) and (d) during precharging operation.
申请公布号 JPS618796(A) 申请公布日期 1986.01.16
申请号 JP19840126792 申请日期 1984.06.20
申请人 NIPPON DENKI KK 发明人 TADA KAZUHIRO
分类号 G11C11/401;G11C7/22;G11C8/18;G11C11/407 主分类号 G11C11/401
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