| 摘要 |
PURPOSE:To reduce the capacity of a chargeable battery serving as a power supply by putting an FIFO circuit between a data transfer processing microcomputer and a demodulator. CONSTITUTION:An FIFO circuit 6 can set the bit length of each message through a data bus (f) and stores the output result of a majority circuit 5 until an access is fed from outside. Then the circuit 6 outputs a signal showing an idle state together with the message through a bus (g) when the reading is through with a message. A message is totally demodulated and stored by the frame synchronizing signal owing to the presence of the circuit 6. Then the stored data can be read after the processing carried out by a microcomputer is settled down by a step. |
