| 摘要 |
PURPOSE:To simplify the circuit constitution by providing an MOSFET brought into the series mode to only an MOSFET turned on by a precharge level of a dynamic logical circuit or turning on this input MOSFET and applying a prescribed a clock signal. CONSTITUTION:A decoding tree DT consists of a PLA (programmable logic array). Two ROMs constituting AND and OR arrays are activated in a complementary way according to a system clock signal phi. That is, the AND array DT makes precharging while a clock signal phi' is at a high level and the OR array ROM makes read during this time. Further, when the clock signal phi' reaches a low level, the AND array DT makes read and the OR array ROM makes precharging. The AND array DT and the OR array ROM make precharging and read in a complementary way through the operation above. |
