| 摘要 |
PURPOSE:To constitute simply a frame protection circuit by providing a simple frame pattern detection output control circuit to a frame pattern detection circuit, a protection stage number circuit and a counter circuit. CONSTITUTION:When an output signal FDET (1 pulse) is outputted from a frame pattern detection circuit 10, a flip-flop 41 is read by using a block CLK existing in an output signal FDET. A flip-flop 42 goes to H level by a rising output of the flip-flop 41. A counter circuit 20 is preset or reset by an input of an output signal LOAD and starts counting. The protection stage number circuit 30 reads the next output signal FDET by using a carry output signal CY of the counter circuit 20 and repeats the operation. When the output signal FDET is read for the set number of times, a synchronizing signal (SYN) is outputted externally. |
