发明名称 SEMICONDUCTOR MEMORY DEVICE
摘要 PURPOSE:To enable the increase in integration by increasing the voltage across both poles of a capacitor more than conventional and then by reducing the capacitor area by a method wherein the voltage of reverse polarity to that of the voltage impressed on an electrode of the capacitor on the semiconductor substrate side is impressed on the electrode on the opposite side in the case of writing ''1'' by giving charges to the capacitor of the titled device. CONSTITUTION:A field oxide film 14 is formed on a p type Si substrate 13, and further an oxide film 15 is formed. An n type impurity region 16 is formed by implanting n type impurity ions to a charge accumulated region immediately under this oxide film 15, and a conductive film e.g. a polycrystalline Si film 17 is deposited over the whole surface. Besides, the Si film 17 is selectively etched so that the remaining section forms a capacitor electrode 18 and a transfer gate 19. Thereafter, the etched regions are turned into n<+> impurity diffused layers 20 and 21 by ion implantation of an n type impurity. These diffused layers 20 and 21 serve as the source and drain of a transfer transistor. Finally, an interlayer insulation film 22 is formed over the whose surface, and a contact hole for the diffused layer 21 is bored in this insulation film 22; then, a bit line 23 is formed.
申请公布号 JPS60189963(A) 申请公布日期 1985.09.27
申请号 JP19840045319 申请日期 1984.03.09
申请人 TOSHIBA KK 发明人 WATANABE TOSHIHARU
分类号 H01L27/10;H01L21/8242;H01L27/108;H01L29/78 主分类号 H01L27/10
代理机构 代理人
主权项
地址