发明名称 DIGITAL SIGNAL PROCESSING UNIT
摘要 PURPOSE:To execute an operation easily and exactly by supplying an output of an adder of one digital signal processing unit to an adder of the other digital signal processing unit through a control logic. CONSTITUTION:The titled unit is provided with operating circuits 28a, 28b for adding an input digital data, and registers 30a, 31a, 30b and 31b for holding a result of said addition. Also, it is provided with digital signal processing units 40a, 40b provided with a loop for feeding back the contents of these registers 30a, 31a and 30b, 31b to the circuits 28a, 28b, respectively, through multiplexers 26a, 29a and 26b, 29b. In this case, for instance, control logics 36a, 36b for supplying a carry output of the adder 28b of the device 40b to the adder 28a of the device 40a are provided, therefore, an operation can be executed easily and exactly without providing a special constitution.
申请公布号 JPS60189311(A) 申请公布日期 1985.09.26
申请号 JP19840044242 申请日期 1984.03.08
申请人 SONY KK 发明人 HAMADA OSAMU;KITAZATO NAOHISA
分类号 G06F7/38;G06F7/00;G06F7/50;G06F7/76;G06F17/10;H03H17/02;H03H17/04 主分类号 G06F7/38
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