| 摘要 |
PURPOSE:To increase the areal efficiency of the titled semiconductor integrated circuit by a method wherein one side of a semiconductor substrate is composed of an island region isolated by an insulating film, a horizontal type element formed in said island region and a vertical type element formed on the single crystal layer located outside the island region. CONSTITUTION:After grooves 2, 2,... have been formed on an N type single crystal silicon substrate 1, an insulating film 3 is covered on the surface of a region 5. Then, a single crystal silicon film 11 is grown on the surface whereon the grooves 2, 2,... are formed using the silicon single crystal on the part where the insulating film 3 is removed as a seed. Subsequently, the N type substrate 1 is scraped down to the depth reaching the insulating film 3 by inverting the obverse and reverse of the substrate 1. Then, a P type base region 8, an N type emitter region 9 and a horizontal type bipolar transistor element having a collector contact 10 are formed in the island region 5 which are isolated by the insulating film 3. On the single crystal layer 7 located outside the island region, a vertical type MOS-FFET element having an MOS gate 14 is formed using the N type substrate 1 and the silicon single crystal layer 11 as a drain and the N type region 13 formed in a P type region 12 as a source. As a result, the areal efficiency of the integrated circuit is increased, a leakage current is reduced, and the parasitic effect fue to mutual interference can also be prevented. |
