| 摘要 |
PURPOSE:To attain stabilized timing of bit synchronism by using two carriers with different phase so as to detect a PSK signal and regenerating a clock signal from a signal squaring each signal. CONSTITUTION:A carrier (a) from a voltage controlled oscillator (VCO) 17 and a quadruple phase PSK signal A are inputted to a multiplier 12, and a signal (c) corresponding to a prescribed phase difference is extracted via a low pass filter (LPF) 13 from the output signal. The signal (c) is inputted to a multiplier 18, squared and a signal (h) eliminating the polarity is obtained. Similarly, a signal h' is obtained. Signals (i), i' as the result of waveform shaping of the signals (h), h' are inputted to an AND circuit 25, a signal (j) being logical product is obtained and fed to a one-shot multivibrator 26 and a phase comparator 27. A switch 28 is driven by the output (k). The phase locked loop is formed by applying an output signal from the phase comparator 27 to the VCO 31 via the switch 28, an LPF 29 and an amplifier 30. |
