发明名称 DATA COLLECTION PROCESSOR
摘要 PURPOSE:To detect each data in an optimum state by assigning a proper state change detecting interval to each of plural data collected by a data collecting section by means of a setting means provided to the data processing section. CONSTITUTION:Plural data A-D are sliced at a prescribed level by a converting circuit 11, logical ''1'' or logical ''0'' is outputted, edited (12) and transmitted (13). A data received by a reception circuit 21 is sampled at a prescribed period and written in an RAM23 at all times via a DMA22. The setting device 28 sets state change detecting intervals TA-TD to the data A-D and writes them to a memory EAROM27 possible for rewrite. The state of the collected data A-D and its change are detected to the RAM23 by a program of an ROM25. As a result, when the stable change is within a predetermined prescribed period to each data, the state change detecting interval is decreased or expanded depending whether the number of change is more or less than the prescribed number of times. Thus, each data is detected at an optimum state.
申请公布号 JPS60146549(A) 申请公布日期 1985.08.02
申请号 JP19840002042 申请日期 1984.01.11
申请人 TOSHIBA KK 发明人 SEKIGUCHI KATSUHIKO
分类号 H04Q9/00 主分类号 H04Q9/00
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