发明名称 MANUFACTURE OF MIS TRANSISTOR
摘要 PURPOSE:To prevent the diffusion of an impurity to a gate insulating layer by forming source-drain regions and doping the impurity to a gate electrode at the irreducible minimum of a demand. CONSTITUTION:An SiO2 layer 2 as a gate insulating layer, a poly Si layer 3 and a photo-resist 4 as an implantation stopping layer are applied onto a P-type Si substrate 1 in succession, and the photo-resist 4 and the poly Si layer 3 in a gate forming region are left through patterning. As<+> is implanted while using the photo-resist 4 as a mask, and N<+> type source-drain regions 5, 6 are formed through annealing. The photo-resist 4 is removed, As<+> is implanted to the whole surface of the substrate, and doped to the poly Si layer 3 in a gate electrode. The quantity of a dose at that time is made smaller than that for shaping the source-drain regions, but As<+> is doped to the poly Si layer 3 in the gate electrode at the irreducible minimum of a demand. Accordingly, an effect by a dopant on the gate insulating layer and the surface of the semi conductor substrate is eliminated, thus acquiring the thin insulating layer having normal device characteristics.
申请公布号 JPS61181166(A) 申请公布日期 1986.08.13
申请号 JP19850022372 申请日期 1985.02.07
申请人 FUJITSU LTD 发明人 NAWATA TAKAHARU
分类号 H01L29/78;(IPC1-7):H01L29/78 主分类号 H01L29/78
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