A microcomputer comprises memory (60) and a processor including a plurality of channels (70) to enable data transmission between concurrent processes. An inputting process may input data through one of a plurality of alternative input channels (70). Data transmission occurs when both processes are at corresponding stages in their programs. If an inputting process finds that no outputting process is yet ready on any of the alternative channels the inputting process may be descheduled and sychronisation achieved by special values located in locations (67) in a workspace (60) for the process.
申请公布号
WO8502038(A3)
申请公布日期
1985.07.18
申请号
WO1984GB00378
申请日期
1984.11.02
申请人
INMOS LIMITED;MAY, MICHAEL DAVID;SHEPHERD, ROGER MARK