| 摘要 |
PURPOSE:To prevent deterioration of the performance of the time when executing a self-loop by eliminating a dummy instruction executing cycle caused by reading out again an instruction of the time when a self-loop condition of a branch instruction having a conditional self-loop has been formed. CONSTITUTION:Micro-instructions A, B are read out simultaneously from a control storage 1. In case (1) when a self-loop is formed in an EVEN instruction A, an output line 111 of an AND circuit 9 becomes '1', and in the next cycle after a branch condition has been formed, updating of a PSCDR (data buffer register) 3 is inhibited, and also an output line 114 of an OR circuit 12 goes to '1', and in the cycle in which the branch condition has been formed, updating of a CSDR (data register) 4 is inhibited. Also, in case (2) when the self-loop is formed in an ODD instruction, an output of the OR circuit 12 goes to '1', and updating of the CSDR 4 is inhibited. Moreover, in case (3) when the branch condition is formed in an ODD instruction B, and it is made to branch to the EVEN instruction of the same word, an output of an AND circuit 11 becomes '1', and updating of the PCSDR 3 in the cycle in which the branch condition has been formed is inhibited. |
