| 摘要 |
PURPOSE:To reduce the number of parts to reduce the cost and improve the reliability by providing a correlating circuit which operates correlations between a receiving code string constituting each frame and a PM code, an output delay circuit of the correlating circuit, a logical state decision circuit, a level discriminating circuit, a sample timing setting circuit, a sample signal generating circuit, and a circuit which receives this sample signal. CONSTITUTION:A correlating circuit 1 operates correlations between a receiving code string d(t), p(t) and a PN code p(t) generated by a PN code generator 12. A delay circuit 2 delays an output phi1(t) by one bit. A code decision circuit 3 operates exclusive OR between outputs C and D of a subtracting circuit 31 and an adding circuit 33, sets the output to the high level if the polarity of the frame is positive in the adding circuit 33, and sets the output to the low level when this polarity is negative. A ring counter 5 receives clocks of a clock generator 9 and uses one frame of the PN code, which is generated by the PN code generator 12, as a period to perform the counting operation. A sample signal generating circuit 6 outputs a signal A once in the initial stage of reception start, and the initial smaple signal A is received by a sample signal generating circuit 7 to output a sample signal S. |
