| 摘要 |
PURPOSE:To prevent voltage comparison operation from being delayed by providing a switching means in series with a load resistor so as to decrease an integration time constant at an output stage of plural voltage comparators. CONSTITUTION:When the 1st switching circuit 30 is turned on, since a differential output current of a voltage comparator A12 flows to the load resistor RL, the current is converted into a voltage by the load resistor RL. When the 2nd switching circuit 31 is turned on, the circuit 30 is turned off and also a latch circuit 21 is operated, then voltage comparison outputs B1, B2 are latched by the latch circuit 21. Since each emitter resistor (re) of switching transistors (TR) 30A-31B is 26/I'OOMEGA, the integration time constant at the differential output stage is re.Cs. Since the resistor (re) is sufficiently smaller than the resistor RL, the integration time constant is decreased sufficiently. Thus, the delay time of the voltage comparison output obtained at the differential output stage of the voltage comparator A12 is decreased so as to improve the delay in the voltage comparing output. |
