发明名称 COMPLEMENTARY MOS SEMICONDUCTOR DEVICE AND MANUFACTURE THEREOF
摘要 PURPOSE:To prevent a complementary MOS semiconductor device from generation of a soft error by a method wherein at the interface between a substrate and at least one side of adjoining two element regions having the differently conductive types, an impurity layer of oppositely conductive type from the former region and having the specified concentration is provided. CONSTITUTION:Element isolation regions 104 are provided on a p type silicon substrate 101, a p type element region 109 and an n type element region 110 consisting of single crystal silicon layers are provided in island type substrate regions, and at the interface of the p type element region 109 between the substrate 101, an n<+> type single crystal silicon layer 107 of oppositely conductive type from the former region and having concentration of 10<16>/cm<3> or more is formed. When alpha rays enter, electrons generated in the region 109 are absorbed in the silicon layer 107, holes generated in the region 110 are absorbed in the substrate 101, and both the p-channel transistor and the n-channel transistor can suppress generation of a soft error.
申请公布号 JPS6030167(A) 申请公布日期 1985.02.15
申请号 JP19830138801 申请日期 1983.07.29
申请人 TOSHIBA KK 发明人 MAEDA SATORU;IWAI HIROSHI
分类号 H01L27/08;H01L21/74;H01L21/762;H01L21/8238;H01L27/092;H01L27/105;H01L29/78 主分类号 H01L27/08
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